Generally, in an integrated circuit, if a bias circuit is produced by using the Silicon on Insulator (SOI) process or the CMOS process, an operation amplifier is configured to lock the generated reference voltage at a voltage that is required by a load circuit. It is easy and common for a bias circuit to be produced by using the SOI process. However, it is difficult to produce the design of a bias circuit by using a III-V fabrication process due to the configuring of an operation amplifier. Even though a bias circuit can be successfully produced by using the III-V process, this bias circuit would have a complicated structure and a larger circuit area, it would thus be uneconomical to have this bias circuit in a chip.